Faculty Faculty -> Full Professor |
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Arces - LyrasCE |
Phone: 0547339239 Mobile: +39 320 4230327 |
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- D. Siprak, M. Tiebout, N. Zanolla, P. Baumgartner, C. Fiegna, "Noise reduction in CMOS circuits through switched gate and forward substrate bias", 2009 Journal of Solid-State Circuits 44 7 1959-1967 IEEE 447
- N. Zanolla, D. Siprak, M. Tiebout, P. Baumgartner, E. Sangiorgi, C. Fiegna, "Suppression of Random Telegraph Signal Noise in small-area MOSFETs under switched gate and substrate bias conditions", 2009 20th International Conference on Noise and Fluctuations 201-204 AIP 447
- M. Braccioli, C. Fiegna, E. Sangiorgi, "Comparative analysis of self-heating in different SOI architectures", 2008 EuroSOI 2008 31-32 445
- N. Zanolla, D. Siprak, P. Baumgartner, E. Sangiorgi, C. Fiegna, "Measurement and simulation of gate voltage dependence of RTS emission and capture time constants in MOSFETs", 2008 9th International Conference on Ultimate integration on Silicon, ULIS 137-140 447
- M. Braccioli, P. Palestri, T. Poiroux, M. Vinet, G. Le Carval, M. Mouis, C. Fiegna, E. Sangiorgi, S. Deleonibus, "Monte-Carlo Simulation of MOSFETs with Band-Offsets in the Source and Drain", 2008 Solid-State Electronics 52 506-512 Full-band Monte-Carlo simulations of short channel double-gate SOI nMOSFETs were used to assess possible enhancement of drain
current in devices featuring a conduction band offset between the source and the channel as those obtained using non-conventional
source/drain materials. We found that the coupling between carrier transport and device electrostatics tends to balance the enhancement
of charge injection provided by the band discontinuity, so that the largest contribution to the current enhancement given by alternative
S/D materials is due to the strain that they induce in the channel. 445
- D. Siprak, N. Zanolla, M. Tiebout, P. Baumgartner, C. Fiegna, "Reduction of Low-Frequency Noise in MOSFETs under Switched Gate and Substrate Bias", 2008 38th European Solid-State Device Research Conference 266-269 IEEE 447
- M. Braccioli,G. Curatola, Y. Yang, E. Sangiorgi, C. Fiegna, "Simulation of Self-Heating effects in 30nm
gate length FinFET", 2008 ULIS 2008 137-140 This paper presents a detailed thermal analysis
of nanoscale FinFET devices. A three-dimensional
electro-thermal device simulator, calibrated against
Monte Carlo simulations at various temperatures, is
adopted in order to study self-heating effects in Fin-
FETs, and their dependence on geometrical parameters
such as buried oxide thickness, source/drain extension
length, fin-pitch and fin height. 445
- M. Braccioli,G. Curatola, Y. Yang, E. Sangiorgi, C. Fiegna, "Simulation of Self-Heating effects in 30nm
gate length FinFET", 2008 ULIS 2008 137-140 This paper presents a detailed thermal analysis
of nanoscale FinFET devices. A three-dimensional
electro-thermal device simulator, calibrated against
Monte Carlo simulations at various temperatures, is
adopted in order to study self-heating effects in Fin-
FETs, and their dependence on geometrical parameters
such as buried oxide thickness, source/drain extension
length, fin-pitch and fin height. 445
- N. Zanolla, D. Siprak, M. Tiebout, P. Baumgartner, E. Sangiorgi, C. Fiegna, "The impact of substrate bias on RTS and flicker noise in MOSFETs operating under switched gate bias", 2008 9th International Conference on Solid State and Integrated Circuits Technology, ICSICT (invited) 80-83 IEEE 447
- M. Braccioli, P. Palestri, T. Poiroux, M. Vinet, G. Le Carval, M. Mouis, C. Fiegna, E. Sangiorgi, S. Deleonibus, "Monte-Carlo Simulation of MOSFETs with Band-Offsets in the Source and Drain", 2007 ULIS 2007 39-42 Full-Band Monte-Carlo simulations of short channel
Double-Gate SOI nMOSFETs were used to assess possible
current improvement in devices featuring conduction
band offset between the source and the channel,
obtained using non-conventional S/D materials. We
found that the coupling between carrier transport and
device electrostatics tends to balance the enhancement
in charge injection provided by the band discontinuity,
so that the largest current enhancement given by alternative
S/D materials is given by the strain that they induce
in the channel. 445
- F. Lodesani, M. Bennati, C. Fiegna, M. Tartagni, "Quantitative Detection by Single Ion Channel Event Statistics: an ", 2007 NSTI Nanotech 2007 Santa Clara 156
- N. Barin, C. Fiegna, E. Sangiorgi, "Analysis of the effects of strain on ultra-thin SOI MOS Devices", 2006 International Journal of High Speed Electronics and Systems, Vol. 16, No. 1 pp. 105-114, 2006
- N. Barin, M. Braccioli, C. Fiegna, E. Sangiorgi, "Analysis of two alternative scaling strategies for sub-30 nm Double-Gate SOI MOSFETs", 2006 IEEE 2006 Silicon Nanoelectronics Workshop Proceedings pag.69-70
- S. Eminente, N. Barin, P. Palestri, C. Fiegna, E. Sangiorgi, "Monte Carlo Simulation of deca-nanometer MOSFETs for Analog/Mixed-signal and RF applications", 2006 accepted for presentation at IEDM 2006.
- N. Barin, P. Palestri, C. Fiegna, "Monte-Carlo Analysis of Signal Propagation Delay and AC Performance of Decananometric Bulk and Double-Gate MOSFETs", 2006 ULIS 2006 Proc., pp.85-88, 2006.
- I. Riolino, M. Braccioli, L. Lucci, D. Esseni, C. Fiegna, P. Palestri, L. Selmi, "Monte-Carlo Simulation of Decananometric Double-Gate SOI devices: Multi-Subband vs. 3D-Electron Gas with Quantum Corrections", 2006 accepted for presentation at European Solid State Device Research Conference 2006
- P. Palestri, N. Barin, D. Esseni, C. Fiegna, "Revised stability analysis of the nonlinear Poisson scheme in self-consistent Monte Carlo device simulations", 2006 IEEE Transactions on Electron Devices, Volume 53, N. 6, pp. 1443 - 1451, June 2006
- P. Palestri, N. Barin, D. Esseni, C. Fiegna, "Stability of self-consistent Monte Carlo Simulations: effects of the grid size and of the coupling scheme", 2006 IEEE Transactions on Electron Devices, Volume 53, N. 6, pp. 1433 - 1442, June 2006
- P. Palestri, S. Eminente, D. Esseni, C. Fiegna, E. Sangiorgi, L. Selmi, "An improved semiclassical Monte-Carlo approach for nano-scale MOSFET, Simulation", 2005 Solid State Electronics, Vol. 49/5, pp. 727-732, 2005
- E. Sangiorgi, P. Palestri, S. Eminente, D. Esseni, C. Fiegna, L. Selmi, "Ballistic Effects in Advanced MOSFETs along the Roadmap", 2005 Proceedings of the 4th International Conference on Semiconductor Technology, pp. 42-47, Shangai, China, 2005
- M. Braccioli, S. Eminente, P. Palestri, D. Esseni, C. Fiegna, "Comparison of BULK and Ultra-Thin Dou-ble Gate SOI MOSFETs for the 65 nm Technology Node: a Monte-Carlo Study", 2005 Proceedings of MSED 2005, pp. 89-90, Workshop on Modeling and Simulation of Electron Devices, July 2005
- N. Barin, M. Braccioli, C. Fiegna, E. Sangiorgi, "Scaling the High-Performance Double-Gate SOI MOSFET down to the 32 nm Technology Node with SiO2-based Gate Stacks", 2005 IEDM Tech. Dig., pp. 623-626, December 2005
- N. Barin, P. Palestri , D. Esseni, C. Fiegna, "Stability of Self-Consistent Monte-Carlo Simulations: Revised Analysis of Linear and Non-Linear Poisson Schemes", 2005 Proceedings of MSED 2005, pp. 93-94, Workshop on Modeling and Simulation of Electron Devices, July 2005
- S. Eminente, D. Esseni, P. Palestri, C. Fiegna, L. Selmi, E. Sangiorgi, "Understanding quasi-ballistics transport in nano-MOSFETS: Part II technology scaling along the ITRS", 2005 IEEE Transactions on Electron Devices, Vol. 52, N. 12, pp. 2736- 2743, 2005
- P. Palestri, D. Esseni, S. Eminente, C. Fiegna, E. Sangiorgi,. L. Selmi, "Understanding Quasi-Ballistics Trasport in Nano-MOSFETS: Part I Scattering in the Channel and in the Drain", 2005 IEEE Transactions on Electron Devices, Vol. 52, N. 12, pp. 2727- 2735, 2005
- P. Palestri, D. Esseni, S. Eminente, C. Fiegna, E. Sangiorgi, L. Selmi, "A Monte-Carlo study of the role of scattering in decananometer MOSFETs", 2004 IEDM Tech. Dig., pp. 605 - 608, December 2004
- N. Barin, C. Fiegna, "Analysis of double-gate MOS structures by solving Poisson and Schroedinger equations with open boundaries", 2004 Proceedings ULIS 2004 Workshop, pp. 93-96, 2004.
- N. Barin, C. Fiegna, E. Sangiorgi, "Analysis of strained-silicon-on-insulator double-gate MOS structures", 2004 Proceeding of the 34th European Solid-State Device Research Conference ESSDERC 2004, pag 169-172, Leuven, Belgium 21-23 September 2004
- S. Eminente, M. Alessandrini_, C. Fiegna, "Comparative Analysis of the RF and Noise Performance of Bulk and Single-Gate Ultra-thin SOI MOSFETs by Numerical Simulation", 2004 Solid State Electronics, Vol. 48/4, pp. 543 549, 2004.
- M. Alessandrini_, D. Esseni, C. Fiegna, "Development of an analytical mobility model for the simulation of ultra thin single- and double-gate SOI MOSFETs", 2004 Solid State Electronics, Vol. 48/4, pp. 589 595, 2004.
- S. Eminente, D. Esseni, P. Palestri, C. Fiegna, L. Selmi, E. Sangiorgi, "Enhanced ballisticity in nano-MOSFETs along the ITRS roadmap: A Monte Carlo study", 2004 IEDM Tech. Dig., pp. 609 - 612, December 2004
- E. Sangiorgi, P. Palestri, D. Esseni, C. Fiegna, A. Abramo, L. Selmi, "Device simulation for decananometer MOSFETs", 2003 Materials Science in Semiconductor Processing, No. 6, pp. 93-105, 2003
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